In recent years, due to the demands for semiconductor devices with increased capacity, stacked semiconductor devices configured by a plurality of semiconductor dies stacked over a lead frame have been more commonly used. Further, as reduction in thickness and size is also desired for such a stacked semiconductor device, a wire bonding method of sequentially connecting between pads of adjacent semiconductor dies or a pad of a semiconductor die and a lead of a lead frame is employed, for example, as described in Japanese Patent No. 3573133, instead of individually connecting a pad of a semiconductor die of each layer and a lead frame. According to this method, in order to reduce damages caused on the semiconductor dies during wire bonding, the wire is sequentially connected to the pads of the semiconductor dies up to an uppermost layer from the lead frame by first forming a bump on the pad of each semiconductor die, then performing reverse bonding from the lead on the lead frame to the pad of a semiconductor die, and further performing another reverse bonding from the bump to which the bonding has been performed to the bump of an adjacent semiconductor die.
Moreover, as described in Japanese Patent No. 3869562, for example, it has been proposed a method of connecting a wire by forming a bump that reduces damages caused on a semiconductor die when bonding only on a pad surface of an intermediate layer of a stacked semiconductor device, performing ball bonding to a pad of a semiconductor die at an uppermost layer, looping a wire onto the bump that has been formed on the pad of the intermediate layer and bonding the wire onto the bump, further looping the wire continuously, and performing stitch bonding onto a pad or a lead of an adjacent intermediate layer.
However, the conventional technique described in Japanese Patent No. 3573133 performs the wire bonding after the bumps are formed on the pads of the semiconductor dies, and there is a problem that it takes time and cost for bonding as a number of steps is large. For example, the connection between the pads and the lead of a stacked semiconductor in which two layers are stacked involves four steps in total: steps of forming bumps respectively on the pads of the semiconductor dies in the two layers (two steps), bonding between the lead and the bump on the pad of a semiconductor die of a first layer, bonding between the bump of the first layer and the bump on the pad of the semiconductor die of a second layer. Further, the conventional technique described in Japanese Patent No. 3869562 performs the bonding after the bump is formed only on the pad of the semiconductor die of the intermediate layer and requires a bump forming process in addition to the bonding process, and therefore the technique does not address the problem of the increased number of steps, even though the number of steps in the bonding process is smaller than that in the conventional technique described in Japanese Patent No. 3573133.
The present invention aims to provide connection of a wire in a semiconductor device with a smaller number of times of bonding while reducing damage caused to the semiconductor dies.